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Central processing unit
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621	Vijay Janapa Reddi 345 Harvard Street, #1D Cambridge, MAU.S.A Mobile: ( Add to Reading List Source URL: users.ece.utexas.edu Language: English - Date: 2012-09-09 15:33:40 Itanium Intel Core Computer science Central processing unit Computer architecture Vijay
622	ParaShares: Finding the Important Basic Blocks in Multithreaded Programs Melanie Kambadur, Kui Tang, and Martha Kim Columbia University, New York, NY {melanie, martha}@cs.columbia.edu, Add to Reading List Source URL: kui-tang.com Language: English Computer programming Threads Microprocessors Task parallelism Basic block Multithreading Central processing unit Process Lock Computing Concurrent computing Parallel computing
623	A Software Approach to Unifying Multicore Caches Silas Boyd-Wickizer, M. Frans Kaashoek, Robert Morris, and Nickolai Zeldovich Abstract This paper explores the opportunity for better management of Add to Reading List Source URL: pdos.csail.mit.edu Language: English - Date: 2015-04-29 10:31:15 Computer memory Cache Computer engineering Central processing unit Computer architecture CPU cache Multi-core processor TILE64 Parallel computing Computer hardware Microprocessors Computing
624	Is superoptimisation a viable technique for virtual machines? Abstract The term “optimisation” is typically used by computer scientists to refer to the improvement of the performance of code. Superoptimisation, first Add to Reading List Source URL: www.tomhume.org Language: English Central processing unit Binary translation Assembly language Algorithm Virtual machine OpenVMS Ring Instruction set DEC Alpha Computing Computer architecture Programming language implementation
625	Microsoft Word - vol1_Part 2_OS Scrub.doc Add to Reading List Source URL: files.renderingpipeline.com Language: English - Date: 2013-09-24 10:25:31 Computing Memory management Central processing unit CPU cache Page table Paging Graphics address remapping table Page Memory address Computer hardware Virtual memory Computer memory
626	Features • High-performance, Low-power AVR® 8-bit Microcontroller • Advanced RISC Architecture • Add to Reading List Source URL: myrobot.ru Language: English - Date: 2006-11-08 15:28:36 Computer hardware Instruction set architectures Central processing unit Atmel AVR Norwegian Institute of Technology Status register Atmel AVR instruction set Computer architecture Microcontrollers Computing
627	The Cache Performance of Blocked Monica S. Lam, Add to Reading List Source URL: www-suif.stanford.edu Language: English - Date: 2003-10-16 22:29:20 Computer hardware Compiler optimizations CPU cache Central processing unit Data Memory hierarchy Cache-oblivious algorithm Loop tiling Cache Computer memory Computing
628	Reinventing Scheduling for Multicore Systems Silas Boyd-Wickizer, Robert Morris, M. Frans Kaashoek (MIT) A BSTRACT cache in other cores, but if the application stays on one Add to Reading List Source URL: pdos.csail.mit.edu Language: English - Date: 2015-04-29 10:31:17 Microprocessors Central processing unit Computer memory Parallel computing CPU cache Multi-core processor Scheduling Thread Memory hierarchy Computing Computer hardware Computer architecture
629	A FPGA based Forth microprocessor P. H. W. Leong, P. K. Tsang and T. K. Lee Department of Computer Science and Engineering The Chinese University of Hong Kong Shatin, N.T. Hong Kong Systems which employ a microprocessor Add to Reading List Source URL: home.claranet.nl Language: English - Date: 2008-07-18 17:49:45 Stack machine Instruction set Field-programmable gate array Datapath Reduced instruction set computing Instruction set architectures PicoBlaze X86 assembly language Computer architecture Central processing unit Computer hardware
630	Microsoft WordCharacterization of EEMBC Benchmark Suite.doc Add to Reading List Source URL: www.eembc.org Language: English - Date: 2013-07-17 17:05:24 Embedded systems Electronics Benchmark EEMBC Computer performance CPU design CPU cache NBench Computer hardware Central processing unit Computing

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